Program


Tentative Schedule

Pacific Time

Thursday 29th

4:00pm

Opening

Yervant Zorian (Synopsys), Opening remarks
Mehdi Tahoori (KIT), Program Introduction

4:10pm

Keynote 1

Sudhanva Gurumurthi (AMD)
Heterogeneous Systems Resilience: From Research to Industry Standards

5:00pm

Human Factor break

5:15pm

Technical Session 1

Amit Pandey (Amazon), High Speed IO Access for Test forms the foundation for Silicon Lifecycle Management

Sandeep Bhatia (Google), Functional Testing for HBM and DDR Memories

6:15pm

End of Day 1

 

Friday 30th

8:30am

Technical Session 2

Andrea Matteucci, Alex Burlak, Marc Hutner, Nir Server (proteanTecs), GUC’s GLink case study: Performance and reliability monitoring for heterogeneous packaging, combining deep data with machine learning algorithms

Mahta Mayahinia (KIT), Gurgen Harutyunyan (Synopsys), Grigor Tshagharyan (Synopsys), An Efficient Test Strategy for Detection of Electromigration Impact in Advanced FinFET Memories

Firooz Massoudi, Ash Patel (Synopsys), Silicon Lifecycle Management optimizes Vmin search enabling efficient & reliable chip operation

Andy Gothard, Richard Oxland (Siemens), Validation and monitoring through the silicon lifecycle: challenges, requirements and solutions

10:10am

 Break

10:40am

Keynote 2 and Invited Talk 

Subhasish Mitra (Stanford)
A Cambrian Explosion in Electronic System Testing is Dead Ahead

Puneet Gupta (UCLA), Software-Defined Memory Error Correction

12:00pm

Lunch

1:00pm

Keynote 3 

Patrick Groeneveld (Cerebras Systems)
Extreme Scale Machine Learning Hardware

1:50pm

Technical Session 3

Fadi Kurdahi (UC Irvine), Trust, But Verify: Towards Self-Aware, Safe, Autonomous Self-Driving Systems

Rajesh Gupta (UCSD), Building Computing Machines That Sense, Adapt, and Approximate

2:45pm

Human Factor break

3:00pm

Technical Session 4

Wes Smith (Galaxy Semiconductor), Demonstrating Data Analytics for Sensor Data Processing; An Industrial Use Case

Lee Harrison (Siemens), Securing the connected and autonomous vehicle

3:50pm

Closing

Yervant Zorian (Synopsys) and Mehdi Tahoori (KIT), Closing remarks

Keynote 3: Extreme Scale Machine Learning Hardware
Speaker: Patrick Groeneveld

Bio: Patrick Groeneveld currently works at Cerebras Systems, a machine learning hardware startup that makes the world’s first monolithic supercomputer. Before that he worked for many years in the EDA industry. He was Chief Technologist at Magma Design Automation where he was part of the team that developed a groundbreaking RTL-to-GDS2 synthesis product. Patrick was as also a Full Professor of Electrical Engineering at Eindhoven University. He is a lecturer in the EE department at Stanford University and serves as finance chair in the Executive Committee of the Design Automation Conference. Patrick received his MSc and PhD degrees from Delft University of Technology in the Netherlands.