[1] Julien Lallet, Sébastien Pillement, and Olivier Sentieys. Efficient and Flexible Dynamic Reconfiguration for Multi-Context Architectures. Journal of Integrated Circuits and Systems, 4(1):36-44, 2009. [ bib | .pdf ]
[2] D. Chillet, S. Pillement, and O. Sentieys. Ordonnancement de tâches par réseaux de neurones pour architectures de soc hétérogènes. Traitement du signal, 26(1):77-89, 2009. [ bib ]
[3] Julien Lallet, Sébastien Pillement, and Olivier Sentieys. xMAML: a Modeling Language for Dynamically Reconfigurable Architectures. In Proc. of the 12th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), pages 680 - 687, Patras, Greece, August 2009. [ bib | DOI | .pdf ]
[4] R. Santoro, O. Sentieys, and S. Roy. On-the-Fly Evaluation of FPGA-Based True Random Number Generator. In Proc. of the IEEE Computer Society Annual Symposium on VLSI, ISVLSI'09, pages 55-60, Tampa, Florida, USA, May 2009. [ bib | DOI | .pdf ]
[5] R. Santoro, O. Sentieys, and S. Roy. On-line monitoring of random number generators for embedded security. In Proc. of the IEEE International Symposium on Circuits and Systems, ISCAS 2009, pages 3050 - 3053, Taipei, Taiwan, May 2009. [ bib | DOI | .pdf ]
[6] H.-N. Nguyen, D. Menard, and O. Sentieys. Dynamic precision scaling for low power wcdma receiver. In Proc. of the IEEE International Symposium on Circuits and Systems, ISCAS 2009, pages 205-208, Taipei, Taiwan, May 2009. [ bib | .pdf ]
[7] H.N. Nguyen, D. Menard, and O.Sentieys. Design of Optimized Fixed-point WCDMA Receiver. In Proc. of the XVII European Signal and Image Processing Conference (EUSIPCO'09), pages 993-997, Glascow, Scotland, August 2009. EURASIP. [ bib | .pdf ]
[8] M. A. Pasha, S. Derrien, and O. Sentieys. Ultra low-power fsm for control oriented applications. In Proc. of the IEEE International Symposium on Circuits and Systems, ISCAS 2009, pages 1577 - 1580, Taipei, Taiwan, May 2009. [ bib | .pdf ]
[9] M. A. Pasha, S. Derrien, and O. Sentieys. Toward Ultra Low-Power Hardware Specialization of a Wireless Sensor Network Node. In Proc. of the 13th IEEE International Multitopic Conference, INMIC 2009, pages 1-6, Islamabad, Pakistan, December 2009. Best Paper Award. [ bib | DOI | .pdf ]
[10] A. Courtay, J. Laurent, O. Sentieys, and N. Julien. Interconnect explorer: A high-level power estimation tool for on-chip interconnects. In Proc. of the IEEE/ACM Design Automation Conference (DAC), User Track, San Francisco, USA, 2009. [ bib | .pdf ]
[11] A. Courtay, J. Laurent, O. Sentieys, and N. Julien. On-chip interconnects energy consumption: High-level estimation and architectural optimizations. In PhD forum of IEEE/ACM Design, Automation & Test in Europe Conference, DATE'09, Nice, France, 2009. [ bib | .pdf ]
[12] A. Courtay, J. Laurent, O. Sentieys, and N. Julien. Novel Cross-Transition Elimination Technique Improving Delay and Power Consumption for On-Chip Buses. In Proc. of the IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), volume 5349 of Lecture Notes in Computer Science (LNCS), pages 359-368, Lisbon, Portugal, March 2009. Springer-Verlag. [ bib | http | .pdf ]
[13] R. Santoro, A. Tisserand, O. Sentieys, and S. Roy. Arithmetic operators for on-the-fly evaluation of TRNGs. In Proc. of the Advanced Signal Processing Algorithms, Architectures and Implementations XVIII, volume 7444, pages 1-12, San Diego, CA, USA, August 2009. SPIE. [ bib | DOI | .pdf ]
[14] D. Menard, E. Casseau, S. Khan, O. Sentieys, S. Chevobbe, S. Guyetant, and R. David. Reconfigurable operator based multimedia embedded processor. In Proc. of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications, volume 5453 of Lecture Notes in Computer Science, pages 39-49. Springer, 2009. [ bib | http | .pdf ]
[15] Q.-T. Ngo, O. Berder, B. Vrigneau, and O. Sentieys. Minimum distance based precoder for mimo-ofdm systems using a 16-qam modulation. In Proc. of the IEEE International Conference on Communications (ICC), pages 1-5, Dresden, Germany, June 2009. [ bib | .pdf ]
[16] T-D. Nguyen, O. Berder, and O. Sentieys. Cooperative strategies comparison for infrastructure and vehicle communications in captiv. In Proc. of the 9th International Conference on ITS Telecommunication (ITST), Lille, France, October 2009. [ bib | .pdf ]
[17] J. Lallet, S. Pillement, and O. Sentieys. Plate-forme de Conception d'Architectures Reconfigurables Dynamiquement pour le Domaine du TSI. In Proc. of the 22nd Symposium on Signal and Image Processing (GRETSI), pages 210-215, September 2009. [ bib | .pdf ]
[18] H. Dubois, O. Berder, G. Garnier, B. Vrigneau, and O. Sentieys. Architecture optimisée de svd pour le calcul d'un précodeur dans une chaine de transmission mimo. In Proc. of the 22nd Symposium on Signal and Image Processing (GRETSI), pages 301-304, Dijon, France, September 2009. [ bib ]
[19] A. Eiche, D. Chillet, S. Pillement, and O. Sentieys. Flot d'ordonnancement pour architecture reconfigurable. In Proc. of the Symposium en Architecture de machines (SympA'13), Toulouse, France, September 2009. [ bib ]

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