Key words: Embedded System Design, System-on-Chip, Reconfigurable Architectures, Low-Power Integrated Circuits and Systems, Finite Arithmetic Effects, Signal Processing for Wireless Communications, Cooperation in Mobile Systems, Wireless Sensor Networks

Research Themes

  • Dynamically reconfigurable coarse-grain architectures, reconfigurable memory structures, embedded FPGA, hardware description language
  • High-level synthesis of specialized virtual components under power and accuracy constraints
  • Automatic floating-point to fixed-point conversion, analytical accuracy evaluation of fixed-point systems
  • High-rate true random number generation, hardware acceleration of statistical test
  • Power consumption estimation and reduction in SoCs
  • Ultra-low-power architectures for wireless sensor networks
  • Signal processing for power reduction in wireless sensor networks
  • Cooperative wireless systems

Past Research Themes

Research Projects

  • CominLabs BoWI Body-World Interaction: Towards an accurate gesture and body movement estimation using very-small and low-power wearable sensor nodes
  • FP7 ALMA Architecture Oriented Parallelization for High Performance Embedded Multicore Systems Using Scilab (2011-2014)
  • FP7 FLEXTILES Self-Adaptive Heterogeneous Manycore Based on Flexible Tiles (2011-2014)
  • ANR DEFIS Design of Fixed-Point Systems (2011-2014)
  • ANR GRECO Green Wireless Communicating Objects (2010-2013)
  • FUI 100GFLEX New Transmission Scheme with Multiband Optical-OFDM at Very-High Rates (up to 100 Gbits/s) (2010-2014)

Completed Research Projects

  • ITEA2 GEODES Global Energy Optimisation for Distributed Heerogeneous Embedded Systems (2008-2011)
  • NANO2012 S2S4HLS Source-to-Source Transformations for High-Level Synthesis
  • ANR OPEN-PEOPLE Open Power and Energy Optimization Platform and Estimator (2009-2011)
  • ANR CIFAER Communications Intra-véhicule flexible et architecture embarquée reconfigurable (2008-2010)
  • CAPTIV Consommation et Stratégies Coopératives pour les Transmissions entre Infrastructure et Véhicules (2006-2009)
  • ANR SVP Supervise and Protect (2005-2008)
  • COMAP (P2R with Germany) Co-Design of  Massively Parallel Embedded Processor Architectures (2005-2008)
  • PHRASE (with STMicroelectronics) Reconfigurability and VLIW Processors in Parallel Heterogeneous Architectures (2000-2003)
  • RNTL OSGAR Generic High-Level Synthesis for Reconfigurable Circuits (2003-2005)
  • OMNIBASE LOGIC INC., Architectures Based on Multiplt-Valued Logic (2001-2004)